Merge pull request #10925 from hashicorp/deps-update-aws-cpus
env/aws: update ec2 cpu data
This commit is contained in:
commit
d4d558fae8
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@ -42,386 +42,390 @@ func LookupEC2CPU(instanceType string) *CPU {
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var instanceTypeCPU = map[string]CPU{
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"a1.2xlarge": newCPU(8, 2.3),
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"a1.4xlarge": newCPU(16, 2.3),
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"a1.large": newCPU(2, 2.3),
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"a1.medium": newCPU(1, 2.3),
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"a1.metal": newCPU(16, 2.3),
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"a1.xlarge": newCPU(4, 2.3),
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"c3.2xlarge": newCPU(8, 2.8),
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"c3.4xlarge": newCPU(16, 2.8),
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"c3.8xlarge": newCPU(32, 2.8),
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"c3.large": newCPU(2, 2.8),
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"c3.xlarge": newCPU(4, 2.8),
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"c4.2xlarge": newCPU(8, 2.9),
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"c4.4xlarge": newCPU(16, 2.9),
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"c4.8xlarge": newCPU(36, 2.9),
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"c4.large": newCPU(2, 2.9),
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"c4.xlarge": newCPU(4, 2.9),
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"c5.12xlarge": newCPU(48, 3.6),
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"c5.18xlarge": newCPU(72, 3.4),
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"c5.24xlarge": newCPU(96, 3.6),
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"c5.2xlarge": newCPU(8, 3.4),
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"c5.4xlarge": newCPU(16, 3.4),
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"c5.9xlarge": newCPU(36, 3.4),
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"c5.large": newCPU(2, 3.4),
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"c5.metal": newCPU(96, 3.6),
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"c5.xlarge": newCPU(4, 3.4),
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"c5a.12xlarge": newCPU(48, 3.3),
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"c5a.16xlarge": newCPU(64, 3.3),
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"c5a.24xlarge": newCPU(96, 3.3),
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"c5a.2xlarge": newCPU(8, 3.3),
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"c5a.4xlarge": newCPU(16, 3.3),
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"c5a.8xlarge": newCPU(32, 3.3),
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"c5a.large": newCPU(2, 3.3),
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"c5a.xlarge": newCPU(4, 3.3),
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"c5ad.12xlarge": newCPU(48, 3.3),
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"c5ad.16xlarge": newCPU(64, 3.3),
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"c5ad.24xlarge": newCPU(96, 3.3),
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"c5ad.2xlarge": newCPU(8, 3.3),
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"c5ad.4xlarge": newCPU(16, 3.3),
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"c5ad.8xlarge": newCPU(32, 3.3),
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"c5ad.large": newCPU(2, 3.3),
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"c5ad.xlarge": newCPU(4, 3.3),
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"c5d.12xlarge": newCPU(48, 3.6),
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"c5d.18xlarge": newCPU(72, 3.4),
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"c5d.24xlarge": newCPU(96, 3.6),
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"c5d.2xlarge": newCPU(8, 3.4),
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"c5d.4xlarge": newCPU(16, 3.4),
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"c5d.9xlarge": newCPU(36, 3.4),
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"c5d.large": newCPU(2, 3.4),
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"c5d.metal": newCPU(96, 3.6),
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"c5d.xlarge": newCPU(4, 3.4),
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"c5n.18xlarge": newCPU(72, 3.4),
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"c5n.2xlarge": newCPU(8, 3.4),
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"c5n.4xlarge": newCPU(16, 3.4),
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"c5n.9xlarge": newCPU(36, 3.4),
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"c5n.large": newCPU(2, 3.4),
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"c5n.metal": newCPU(72, 3.4),
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"c5n.xlarge": newCPU(4, 3.4),
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"c6g.12xlarge": newCPU(48, 2.5),
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"c6g.16xlarge": newCPU(64, 2.5),
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"c6g.2xlarge": newCPU(8, 2.5),
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"c6g.4xlarge": newCPU(16, 2.5),
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"c6g.8xlarge": newCPU(32, 2.5),
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"c6g.large": newCPU(2, 2.5),
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"c6g.medium": newCPU(1, 2.5),
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"c6g.metal": newCPU(64, 2.5),
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"c6g.xlarge": newCPU(4, 2.5),
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"c6gd.12xlarge": newCPU(48, 2.5),
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"c6gd.16xlarge": newCPU(64, 2.5),
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"c6gd.2xlarge": newCPU(8, 2.5),
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"c6gd.4xlarge": newCPU(16, 2.5),
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"c6gd.8xlarge": newCPU(32, 2.5),
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"c6gd.large": newCPU(2, 2.5),
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"c6gd.medium": newCPU(1, 2.5),
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"c6gd.metal": newCPU(64, 2.5),
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"c6gd.xlarge": newCPU(4, 2.5),
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"c6gn.12xlarge": newCPU(48, 2.5),
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"c6gn.16xlarge": newCPU(64, 2.5),
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"c6gn.2xlarge": newCPU(8, 2.5),
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"c6gn.4xlarge": newCPU(16, 2.5),
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"c6gn.8xlarge": newCPU(32, 2.5),
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"c6gn.large": newCPU(2, 2.5),
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"c6gn.medium": newCPU(1, 2.5),
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"c6gn.xlarge": newCPU(4, 2.5),
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"cc2.8xlarge": newCPU(32, 2.6),
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"d2.2xlarge": newCPU(8, 2.4),
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"d2.4xlarge": newCPU(16, 2.4),
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"d2.8xlarge": newCPU(36, 2.4),
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"d2.xlarge": newCPU(4, 2.4),
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"d3.2xlarge": newCPU(8, 3.1),
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"d3.4xlarge": newCPU(16, 3.1),
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"d3.8xlarge": newCPU(32, 3.1),
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"d3.xlarge": newCPU(4, 3.1),
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"d3en.12xlarge": newCPU(48, 3.1),
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"d3en.2xlarge": newCPU(8, 3.1),
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"d3en.4xlarge": newCPU(16, 3.1),
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"d3en.6xlarge": newCPU(24, 3.1),
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"d3en.8xlarge": newCPU(32, 3.1),
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"d3en.xlarge": newCPU(4, 3.1),
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"f1.16xlarge": newCPU(64, 2.3),
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"f1.2xlarge": newCPU(8, 2.3),
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"f1.4xlarge": newCPU(16, 2.3),
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"g2.2xlarge": newCPU(8, 2.6),
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"g2.8xlarge": newCPU(32, 2.6),
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"g3.16xlarge": newCPU(64, 2.3),
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"g3.4xlarge": newCPU(16, 2.7),
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"g3.8xlarge": newCPU(32, 2.7),
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"g3s.xlarge": newCPU(4, 2.7),
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"g4ad.16xlarge": newCPU(64, 3),
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"g4ad.4xlarge": newCPU(16, 3),
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"g4ad.8xlarge": newCPU(32, 3),
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"g4dn.12xlarge": newCPU(48, 2.5),
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"g4dn.16xlarge": newCPU(64, 2.5),
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"g4dn.2xlarge": newCPU(8, 2.5),
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"g4dn.4xlarge": newCPU(16, 2.5),
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"g4dn.8xlarge": newCPU(32, 2.5),
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"g4dn.metal": newCPU(96, 2.5),
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"g4dn.xlarge": newCPU(4, 2.5),
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"h1.16xlarge": newCPU(64, 2.3),
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"h1.2xlarge": newCPU(8, 2.3),
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"h1.4xlarge": newCPU(16, 2.3),
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"h1.8xlarge": newCPU(32, 2.3),
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"i2.2xlarge": newCPU(8, 2.5),
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"i2.4xlarge": newCPU(16, 2.5),
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"i2.8xlarge": newCPU(32, 2.5),
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"i2.xlarge": newCPU(4, 2.5),
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"i3.16xlarge": newCPU(64, 2.3),
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"i3.2xlarge": newCPU(8, 2.3),
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"i3.4xlarge": newCPU(16, 2.3),
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"i3.8xlarge": newCPU(32, 2.3),
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"i3.large": newCPU(2, 2.3),
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"i3.metal": newCPU(72, 2.3),
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"i3.xlarge": newCPU(4, 2.3),
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"i3en.12xlarge": newCPU(48, 3.1),
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"i3en.24xlarge": newCPU(96, 3.1),
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"i3en.2xlarge": newCPU(8, 3.1),
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"i3en.3xlarge": newCPU(12, 3.1),
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"i3en.6xlarge": newCPU(24, 3.1),
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"i3en.large": newCPU(2, 3.1),
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"i3en.metal": newCPU(96, 3.1),
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"i3en.xlarge": newCPU(4, 3.1),
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"inf1.24xlarge": newCPU(96, 2.5),
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"inf1.2xlarge": newCPU(8, 2.5),
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"inf1.6xlarge": newCPU(24, 2.5),
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"inf1.xlarge": newCPU(4, 2.5),
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"m3.2xlarge": newCPU(8, 2.5),
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"m3.large": newCPU(2, 2.5),
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"m3.medium": newCPU(1, 2.5),
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"m3.xlarge": newCPU(4, 2.5),
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"m4.10xlarge": newCPU(40, 2.4),
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"m4.16xlarge": newCPU(64, 2.3),
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"m4.2xlarge": newCPU(8, 2.4),
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"m4.4xlarge": newCPU(16, 2.4),
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"m4.large": newCPU(2, 2.4),
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"m4.xlarge": newCPU(4, 2.4),
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"m5.12xlarge": newCPU(48, 3.1),
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"m5.16xlarge": newCPU(64, 3.1),
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"m5.24xlarge": newCPU(96, 3.1),
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"m5.2xlarge": newCPU(8, 3.1),
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"m5.4xlarge": newCPU(16, 3.1),
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"m5.8xlarge": newCPU(32, 3.1),
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"m5.large": newCPU(2, 3.1),
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"m5.metal": newCPU(96, 3.1),
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"m5.xlarge": newCPU(4, 3.1),
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"m5a.12xlarge": newCPU(48, 2.5),
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"m5a.16xlarge": newCPU(64, 2.5),
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"m5a.24xlarge": newCPU(96, 2.5),
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"m5a.2xlarge": newCPU(8, 2.5),
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"m5a.4xlarge": newCPU(16, 2.5),
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"m5a.8xlarge": newCPU(32, 2.5),
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"m5a.large": newCPU(2, 2.5),
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"m5a.xlarge": newCPU(4, 2.5),
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"m5ad.12xlarge": newCPU(48, 2.2),
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"m5ad.16xlarge": newCPU(64, 2.5),
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"m5ad.24xlarge": newCPU(96, 2.2),
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"m5ad.2xlarge": newCPU(8, 2.2),
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"m5ad.4xlarge": newCPU(16, 2.2),
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"m5ad.8xlarge": newCPU(32, 2.5),
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"m5ad.large": newCPU(2, 2.2),
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"m5ad.xlarge": newCPU(4, 2.2),
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"m5d.12xlarge": newCPU(48, 3.1),
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"m5d.16xlarge": newCPU(64, 3.1),
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"m5d.24xlarge": newCPU(96, 3.1),
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"m5d.2xlarge": newCPU(8, 3.1),
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"m5d.4xlarge": newCPU(16, 3.1),
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"m5d.8xlarge": newCPU(32, 3.1),
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"m5d.large": newCPU(2, 3.1),
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"m5d.metal": newCPU(96, 3.1),
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"m5d.xlarge": newCPU(4, 3.1),
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"m5dn.12xlarge": newCPU(48, 3.1),
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"m5dn.16xlarge": newCPU(64, 3.1),
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"m5dn.24xlarge": newCPU(96, 3.1),
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"m5dn.2xlarge": newCPU(8, 3.1),
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"m5dn.4xlarge": newCPU(16, 3.1),
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"m5dn.8xlarge": newCPU(32, 3.1),
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"m5dn.large": newCPU(2, 3.1),
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"m5dn.metal": newCPU(96, 3.1),
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"m5dn.xlarge": newCPU(4, 3.1),
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"m5n.12xlarge": newCPU(48, 3.1),
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"m5n.16xlarge": newCPU(64, 3.1),
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"m5n.24xlarge": newCPU(96, 3.1),
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"m5n.2xlarge": newCPU(8, 3.1),
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"m5n.4xlarge": newCPU(16, 3.1),
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"m5n.8xlarge": newCPU(32, 3.1),
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"m5n.large": newCPU(2, 3.1),
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"m5n.metal": newCPU(96, 3.1),
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"m5n.xlarge": newCPU(4, 3.1),
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"m5zn.12xlarge": newCPU(48, 4.5),
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"m5zn.2xlarge": newCPU(8, 4.5),
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"m5zn.3xlarge": newCPU(12, 4.5),
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"m5zn.6xlarge": newCPU(24, 4.5),
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"m5zn.large": newCPU(2, 4.5),
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"m5zn.metal": newCPU(48, 4.5),
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"m5zn.xlarge": newCPU(4, 4.5),
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"m6g.12xlarge": newCPU(48, 2.5),
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"m6g.16xlarge": newCPU(64, 2.5),
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"m6g.2xlarge": newCPU(8, 2.5),
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"m6g.4xlarge": newCPU(16, 2.5),
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"m6g.8xlarge": newCPU(32, 2.5),
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"m6g.large": newCPU(2, 2.5),
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"m6g.medium": newCPU(1, 2.5),
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"m6g.metal": newCPU(64, 2.5),
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"m6g.xlarge": newCPU(4, 2.5),
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"m6gd.12xlarge": newCPU(48, 2.5),
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"m6gd.16xlarge": newCPU(64, 2.5),
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"m6gd.2xlarge": newCPU(8, 2.5),
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"m6gd.4xlarge": newCPU(16, 2.5),
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"m6gd.8xlarge": newCPU(32, 2.5),
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"m6gd.large": newCPU(2, 2.5),
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"m6gd.medium": newCPU(1, 2.5),
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"m6gd.metal": newCPU(64, 2.5),
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"m6gd.xlarge": newCPU(4, 2.5),
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"mac1.metal": newCPU(12, 3.2),
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"p2.16xlarge": newCPU(64, 2.3),
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"p2.8xlarge": newCPU(32, 2.7),
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"p2.xlarge": newCPU(4, 2.7),
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"p3.16xlarge": newCPU(64, 2.7),
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"p3.2xlarge": newCPU(8, 2.7),
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"p3.8xlarge": newCPU(32, 2.7),
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"p3dn.24xlarge": newCPU(96, 2.5),
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"p4d.24xlarge": newCPU(96, 3),
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"r3.2xlarge": newCPU(8, 2.5),
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"r3.4xlarge": newCPU(16, 2.5),
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"r3.8xlarge": newCPU(32, 2.5),
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"r3.large": newCPU(2, 2.5),
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"r3.xlarge": newCPU(4, 2.5),
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"r4.16xlarge": newCPU(64, 2.3),
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"r4.2xlarge": newCPU(8, 2.3),
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"r4.4xlarge": newCPU(16, 2.3),
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"r4.8xlarge": newCPU(32, 2.3),
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"r4.large": newCPU(2, 2.3),
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"r4.xlarge": newCPU(4, 2.3),
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"r5.12xlarge": newCPU(48, 3.1),
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"r5.16xlarge": newCPU(64, 3.1),
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"r5.24xlarge": newCPU(96, 3.1),
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"r5.2xlarge": newCPU(8, 3.1),
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"r5.4xlarge": newCPU(16, 3.1),
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"r5.8xlarge": newCPU(32, 3.1),
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"r5.large": newCPU(2, 3.1),
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"r5.metal": newCPU(96, 3.1),
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"r5.xlarge": newCPU(4, 3.1),
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"r5a.12xlarge": newCPU(48, 2.5),
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"r5a.16xlarge": newCPU(64, 2.5),
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"r5a.24xlarge": newCPU(96, 2.5),
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"r5a.2xlarge": newCPU(8, 2.5),
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"r5a.4xlarge": newCPU(16, 2.5),
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"r5a.8xlarge": newCPU(32, 2.5),
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"r5a.large": newCPU(2, 2.5),
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"r5a.xlarge": newCPU(4, 2.5),
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"r5ad.12xlarge": newCPU(48, 2.2),
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"r5ad.16xlarge": newCPU(64, 2.5),
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"r5ad.24xlarge": newCPU(96, 2.2),
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"r5ad.2xlarge": newCPU(8, 2.2),
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"r5ad.4xlarge": newCPU(16, 2.2),
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"r5ad.8xlarge": newCPU(32, 2.5),
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"r5ad.large": newCPU(2, 2.2),
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"r5ad.xlarge": newCPU(4, 2.2),
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"r5b.12xlarge": newCPU(48, 3.1),
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"r5b.16xlarge": newCPU(64, 3.1),
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"r5b.24xlarge": newCPU(96, 3.1),
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"r5b.2xlarge": newCPU(8, 3.1),
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"r5b.4xlarge": newCPU(16, 3.1),
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"r5b.8xlarge": newCPU(32, 3.1),
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"r5b.large": newCPU(2, 3.1),
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"r5b.metal": newCPU(96, 3.1),
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"r5b.xlarge": newCPU(4, 3.1),
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"r5d.12xlarge": newCPU(48, 3.1),
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"r5d.16xlarge": newCPU(64, 3.1),
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"r5d.24xlarge": newCPU(96, 3.1),
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"r5d.2xlarge": newCPU(8, 3.1),
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"r5d.4xlarge": newCPU(16, 3.1),
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"r5d.8xlarge": newCPU(32, 3.1),
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"r5d.large": newCPU(2, 3.1),
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"r5d.metal": newCPU(96, 3.1),
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"r5d.xlarge": newCPU(4, 3.1),
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"r5dn.12xlarge": newCPU(48, 3.1),
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"r5dn.16xlarge": newCPU(64, 3.1),
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"r5dn.24xlarge": newCPU(96, 3.1),
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"r5dn.2xlarge": newCPU(8, 3.1),
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"r5dn.4xlarge": newCPU(16, 3.1),
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"r5dn.8xlarge": newCPU(32, 3.1),
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"r5dn.large": newCPU(2, 3.1),
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"r5dn.metal": newCPU(96, 3.1),
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"r5dn.xlarge": newCPU(4, 3.1),
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"r5n.12xlarge": newCPU(48, 3.1),
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"r5n.16xlarge": newCPU(64, 3.1),
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"r5n.24xlarge": newCPU(96, 3.1),
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"r5n.2xlarge": newCPU(8, 3.1),
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"r5n.4xlarge": newCPU(16, 3.1),
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"r5n.8xlarge": newCPU(32, 3.1),
|
||||
"r5n.large": newCPU(2, 3.1),
|
||||
"r5n.metal": newCPU(96, 3.1),
|
||||
"r5n.xlarge": newCPU(4, 3.1),
|
||||
"r6g.12xlarge": newCPU(48, 2.5),
|
||||
"r6g.16xlarge": newCPU(64, 2.5),
|
||||
"r6g.2xlarge": newCPU(8, 2.5),
|
||||
"r6g.4xlarge": newCPU(16, 2.5),
|
||||
"r6g.8xlarge": newCPU(32, 2.5),
|
||||
"r6g.large": newCPU(2, 2.5),
|
||||
"r6g.medium": newCPU(1, 2.5),
|
||||
"r6g.metal": newCPU(64, 2.5),
|
||||
"r6g.xlarge": newCPU(4, 2.5),
|
||||
"r6gd.12xlarge": newCPU(48, 2.5),
|
||||
"r6gd.16xlarge": newCPU(64, 2.5),
|
||||
"r6gd.2xlarge": newCPU(8, 2.5),
|
||||
"r6gd.4xlarge": newCPU(16, 2.5),
|
||||
"r6gd.8xlarge": newCPU(32, 2.5),
|
||||
"r6gd.large": newCPU(2, 2.5),
|
||||
"r6gd.medium": newCPU(1, 2.5),
|
||||
"r6gd.metal": newCPU(64, 2.5),
|
||||
"r6gd.xlarge": newCPU(4, 2.5),
|
||||
"t2.2xlarge": newCPU(8, 2.3),
|
||||
"t2.large": newCPU(2, 2.3),
|
||||
"t2.medium": newCPU(2, 2.3),
|
||||
"t2.micro": newCPU(1, 2.5),
|
||||
"t2.nano": newCPU(1, 2.4),
|
||||
"t2.small": newCPU(1, 2.5),
|
||||
"t2.xlarge": newCPU(4, 2.3),
|
||||
"t3.2xlarge": newCPU(8, 2.5),
|
||||
"t3.large": newCPU(2, 2.5),
|
||||
"t3.medium": newCPU(2, 2.5),
|
||||
"t3.micro": newCPU(2, 2.5),
|
||||
"t3.nano": newCPU(2, 2.5),
|
||||
"t3.small": newCPU(2, 2.5),
|
||||
"t3.xlarge": newCPU(4, 2.5),
|
||||
"t3a.2xlarge": newCPU(8, 2.2),
|
||||
"t3a.large": newCPU(2, 2.2),
|
||||
"t3a.medium": newCPU(2, 2.2),
|
||||
"t3a.micro": newCPU(2, 2.2),
|
||||
"t3a.nano": newCPU(2, 2.2),
|
||||
"t3a.small": newCPU(2, 2.2),
|
||||
"t3a.xlarge": newCPU(4, 2.2),
|
||||
"t4g.2xlarge": newCPU(8, 2.5),
|
||||
"t4g.large": newCPU(2, 2.5),
|
||||
"t4g.medium": newCPU(2, 2.5),
|
||||
"t4g.micro": newCPU(2, 2.5),
|
||||
"t4g.nano": newCPU(2, 2.5),
|
||||
"t4g.small": newCPU(2, 2.5),
|
||||
"t4g.xlarge": newCPU(4, 2.5),
|
||||
"x1.16xlarge": newCPU(64, 2.3),
|
||||
"x1.32xlarge": newCPU(128, 2.3),
|
||||
"x1e.16xlarge": newCPU(64, 2.3),
|
||||
"x1e.2xlarge": newCPU(8, 2.3),
|
||||
"x1e.32xlarge": newCPU(128, 2.3),
|
||||
"x1e.4xlarge": newCPU(16, 2.3),
|
||||
"x1e.8xlarge": newCPU(32, 2.3),
|
||||
"x1e.xlarge": newCPU(4, 2.3),
|
||||
"x2gd.12xlarge": newCPU(48, 2.5),
|
||||
"x2gd.16xlarge": newCPU(64, 2.5),
|
||||
"x2gd.2xlarge": newCPU(8, 2.5),
|
||||
"x2gd.4xlarge": newCPU(16, 2.5),
|
||||
"x2gd.8xlarge": newCPU(32, 2.5),
|
||||
"x2gd.large": newCPU(2, 2.5),
|
||||
"x2gd.medium": newCPU(1, 2.5),
|
||||
"x2gd.metal": newCPU(64, 2.5),
|
||||
"x2gd.xlarge": newCPU(4, 2.5),
|
||||
"z1d.12xlarge": newCPU(48, 4),
|
||||
"z1d.2xlarge": newCPU(8, 4),
|
||||
"z1d.3xlarge": newCPU(12, 4),
|
||||
"z1d.6xlarge": newCPU(24, 4),
|
||||
"z1d.large": newCPU(2, 4),
|
||||
"z1d.metal": newCPU(48, 4),
|
||||
"z1d.xlarge": newCPU(4, 4),
|
||||
"a1.2xlarge": newCPU(8, 2.3),
|
||||
"a1.4xlarge": newCPU(16, 2.3),
|
||||
"a1.large": newCPU(2, 2.3),
|
||||
"a1.medium": newCPU(1, 2.3),
|
||||
"a1.metal": newCPU(16, 2.3),
|
||||
"a1.xlarge": newCPU(4, 2.3),
|
||||
"c3.2xlarge": newCPU(8, 2.8),
|
||||
"c3.4xlarge": newCPU(16, 2.8),
|
||||
"c3.8xlarge": newCPU(32, 2.8),
|
||||
"c3.large": newCPU(2, 2.8),
|
||||
"c3.xlarge": newCPU(4, 2.8),
|
||||
"c4.2xlarge": newCPU(8, 2.9),
|
||||
"c4.4xlarge": newCPU(16, 2.9),
|
||||
"c4.8xlarge": newCPU(36, 2.9),
|
||||
"c4.large": newCPU(2, 2.9),
|
||||
"c4.xlarge": newCPU(4, 2.9),
|
||||
"c5.12xlarge": newCPU(48, 3.6),
|
||||
"c5.18xlarge": newCPU(72, 3.4),
|
||||
"c5.24xlarge": newCPU(96, 3.6),
|
||||
"c5.2xlarge": newCPU(8, 3.4),
|
||||
"c5.4xlarge": newCPU(16, 3.4),
|
||||
"c5.9xlarge": newCPU(36, 3.4),
|
||||
"c5.large": newCPU(2, 3.4),
|
||||
"c5.metal": newCPU(96, 3.6),
|
||||
"c5.xlarge": newCPU(4, 3.4),
|
||||
"c5a.12xlarge": newCPU(48, 3.3),
|
||||
"c5a.16xlarge": newCPU(64, 3.3),
|
||||
"c5a.24xlarge": newCPU(96, 3.3),
|
||||
"c5a.2xlarge": newCPU(8, 3.3),
|
||||
"c5a.4xlarge": newCPU(16, 3.3),
|
||||
"c5a.8xlarge": newCPU(32, 3.3),
|
||||
"c5a.large": newCPU(2, 3.3),
|
||||
"c5a.xlarge": newCPU(4, 3.3),
|
||||
"c5ad.12xlarge": newCPU(48, 3.3),
|
||||
"c5ad.16xlarge": newCPU(64, 3.3),
|
||||
"c5ad.24xlarge": newCPU(96, 3.3),
|
||||
"c5ad.2xlarge": newCPU(8, 3.3),
|
||||
"c5ad.4xlarge": newCPU(16, 3.3),
|
||||
"c5ad.8xlarge": newCPU(32, 3.3),
|
||||
"c5ad.large": newCPU(2, 3.3),
|
||||
"c5ad.xlarge": newCPU(4, 3.3),
|
||||
"c5d.12xlarge": newCPU(48, 3.6),
|
||||
"c5d.18xlarge": newCPU(72, 3.4),
|
||||
"c5d.24xlarge": newCPU(96, 3.6),
|
||||
"c5d.2xlarge": newCPU(8, 3.4),
|
||||
"c5d.4xlarge": newCPU(16, 3.4),
|
||||
"c5d.9xlarge": newCPU(36, 3.4),
|
||||
"c5d.large": newCPU(2, 3.4),
|
||||
"c5d.metal": newCPU(96, 3.6),
|
||||
"c5d.xlarge": newCPU(4, 3.4),
|
||||
"c5n.18xlarge": newCPU(72, 3.4),
|
||||
"c5n.2xlarge": newCPU(8, 3.4),
|
||||
"c5n.4xlarge": newCPU(16, 3.4),
|
||||
"c5n.9xlarge": newCPU(36, 3.4),
|
||||
"c5n.large": newCPU(2, 3.4),
|
||||
"c5n.metal": newCPU(72, 3.4),
|
||||
"c5n.xlarge": newCPU(4, 3.4),
|
||||
"c6g.12xlarge": newCPU(48, 2.5),
|
||||
"c6g.16xlarge": newCPU(64, 2.5),
|
||||
"c6g.2xlarge": newCPU(8, 2.5),
|
||||
"c6g.4xlarge": newCPU(16, 2.5),
|
||||
"c6g.8xlarge": newCPU(32, 2.5),
|
||||
"c6g.large": newCPU(2, 2.5),
|
||||
"c6g.medium": newCPU(1, 2.5),
|
||||
"c6g.metal": newCPU(64, 2.5),
|
||||
"c6g.xlarge": newCPU(4, 2.5),
|
||||
"c6gd.12xlarge": newCPU(48, 2.5),
|
||||
"c6gd.16xlarge": newCPU(64, 2.5),
|
||||
"c6gd.2xlarge": newCPU(8, 2.5),
|
||||
"c6gd.4xlarge": newCPU(16, 2.5),
|
||||
"c6gd.8xlarge": newCPU(32, 2.5),
|
||||
"c6gd.large": newCPU(2, 2.5),
|
||||
"c6gd.medium": newCPU(1, 2.5),
|
||||
"c6gd.metal": newCPU(64, 2.5),
|
||||
"c6gd.xlarge": newCPU(4, 2.5),
|
||||
"c6gn.12xlarge": newCPU(48, 2.5),
|
||||
"c6gn.16xlarge": newCPU(64, 2.5),
|
||||
"c6gn.2xlarge": newCPU(8, 2.5),
|
||||
"c6gn.4xlarge": newCPU(16, 2.5),
|
||||
"c6gn.8xlarge": newCPU(32, 2.5),
|
||||
"c6gn.large": newCPU(2, 2.5),
|
||||
"c6gn.medium": newCPU(1, 2.5),
|
||||
"c6gn.xlarge": newCPU(4, 2.5),
|
||||
"cc2.8xlarge": newCPU(32, 2.6),
|
||||
"d2.2xlarge": newCPU(8, 2.4),
|
||||
"d2.4xlarge": newCPU(16, 2.4),
|
||||
"d2.8xlarge": newCPU(36, 2.4),
|
||||
"d2.xlarge": newCPU(4, 2.4),
|
||||
"d3.2xlarge": newCPU(8, 3.1),
|
||||
"d3.4xlarge": newCPU(16, 3.1),
|
||||
"d3.8xlarge": newCPU(32, 3.1),
|
||||
"d3.xlarge": newCPU(4, 3.1),
|
||||
"d3en.12xlarge": newCPU(48, 3.1),
|
||||
"d3en.2xlarge": newCPU(8, 3.1),
|
||||
"d3en.4xlarge": newCPU(16, 3.1),
|
||||
"d3en.6xlarge": newCPU(24, 3.1),
|
||||
"d3en.8xlarge": newCPU(32, 3.1),
|
||||
"d3en.xlarge": newCPU(4, 3.1),
|
||||
"f1.16xlarge": newCPU(64, 2.3),
|
||||
"f1.2xlarge": newCPU(8, 2.3),
|
||||
"f1.4xlarge": newCPU(16, 2.3),
|
||||
"g2.2xlarge": newCPU(8, 2.6),
|
||||
"g2.8xlarge": newCPU(32, 2.6),
|
||||
"g3.16xlarge": newCPU(64, 2.3),
|
||||
"g3.4xlarge": newCPU(16, 2.7),
|
||||
"g3.8xlarge": newCPU(32, 2.7),
|
||||
"g3s.xlarge": newCPU(4, 2.7),
|
||||
"g4ad.16xlarge": newCPU(64, 3),
|
||||
"g4ad.4xlarge": newCPU(16, 3),
|
||||
"g4ad.8xlarge": newCPU(32, 3),
|
||||
"g4dn.12xlarge": newCPU(48, 2.5),
|
||||
"g4dn.16xlarge": newCPU(64, 2.5),
|
||||
"g4dn.2xlarge": newCPU(8, 2.5),
|
||||
"g4dn.4xlarge": newCPU(16, 2.5),
|
||||
"g4dn.8xlarge": newCPU(32, 2.5),
|
||||
"g4dn.metal": newCPU(96, 2.5),
|
||||
"g4dn.xlarge": newCPU(4, 2.5),
|
||||
"h1.16xlarge": newCPU(64, 2.3),
|
||||
"h1.2xlarge": newCPU(8, 2.3),
|
||||
"h1.4xlarge": newCPU(16, 2.3),
|
||||
"h1.8xlarge": newCPU(32, 2.3),
|
||||
"i2.2xlarge": newCPU(8, 2.5),
|
||||
"i2.4xlarge": newCPU(16, 2.5),
|
||||
"i2.8xlarge": newCPU(32, 2.5),
|
||||
"i2.xlarge": newCPU(4, 2.5),
|
||||
"i3.16xlarge": newCPU(64, 2.3),
|
||||
"i3.2xlarge": newCPU(8, 2.3),
|
||||
"i3.4xlarge": newCPU(16, 2.3),
|
||||
"i3.8xlarge": newCPU(32, 2.3),
|
||||
"i3.large": newCPU(2, 2.3),
|
||||
"i3.metal": newCPU(72, 2.3),
|
||||
"i3.xlarge": newCPU(4, 2.3),
|
||||
"i3en.12xlarge": newCPU(48, 3.1),
|
||||
"i3en.24xlarge": newCPU(96, 3.1),
|
||||
"i3en.2xlarge": newCPU(8, 3.1),
|
||||
"i3en.3xlarge": newCPU(12, 3.1),
|
||||
"i3en.6xlarge": newCPU(24, 3.1),
|
||||
"i3en.large": newCPU(2, 3.1),
|
||||
"i3en.metal": newCPU(96, 3.1),
|
||||
"i3en.xlarge": newCPU(4, 3.1),
|
||||
"inf1.24xlarge": newCPU(96, 2.5),
|
||||
"inf1.2xlarge": newCPU(8, 2.5),
|
||||
"inf1.6xlarge": newCPU(24, 2.5),
|
||||
"inf1.xlarge": newCPU(4, 2.5),
|
||||
"m3.2xlarge": newCPU(8, 2.5),
|
||||
"m3.large": newCPU(2, 2.5),
|
||||
"m3.medium": newCPU(1, 2.5),
|
||||
"m3.xlarge": newCPU(4, 2.5),
|
||||
"m4.10xlarge": newCPU(40, 2.4),
|
||||
"m4.16xlarge": newCPU(64, 2.3),
|
||||
"m4.2xlarge": newCPU(8, 2.4),
|
||||
"m4.4xlarge": newCPU(16, 2.4),
|
||||
"m4.large": newCPU(2, 2.4),
|
||||
"m4.xlarge": newCPU(4, 2.4),
|
||||
"m5.12xlarge": newCPU(48, 3.1),
|
||||
"m5.16xlarge": newCPU(64, 3.1),
|
||||
"m5.24xlarge": newCPU(96, 3.1),
|
||||
"m5.2xlarge": newCPU(8, 3.1),
|
||||
"m5.4xlarge": newCPU(16, 3.1),
|
||||
"m5.8xlarge": newCPU(32, 3.1),
|
||||
"m5.large": newCPU(2, 3.1),
|
||||
"m5.metal": newCPU(96, 3.1),
|
||||
"m5.xlarge": newCPU(4, 3.1),
|
||||
"m5a.12xlarge": newCPU(48, 2.5),
|
||||
"m5a.16xlarge": newCPU(64, 2.5),
|
||||
"m5a.24xlarge": newCPU(96, 2.5),
|
||||
"m5a.2xlarge": newCPU(8, 2.5),
|
||||
"m5a.4xlarge": newCPU(16, 2.5),
|
||||
"m5a.8xlarge": newCPU(32, 2.5),
|
||||
"m5a.large": newCPU(2, 2.5),
|
||||
"m5a.xlarge": newCPU(4, 2.5),
|
||||
"m5ad.12xlarge": newCPU(48, 2.2),
|
||||
"m5ad.16xlarge": newCPU(64, 2.5),
|
||||
"m5ad.24xlarge": newCPU(96, 2.2),
|
||||
"m5ad.2xlarge": newCPU(8, 2.2),
|
||||
"m5ad.4xlarge": newCPU(16, 2.2),
|
||||
"m5ad.8xlarge": newCPU(32, 2.5),
|
||||
"m5ad.large": newCPU(2, 2.2),
|
||||
"m5ad.xlarge": newCPU(4, 2.2),
|
||||
"m5d.12xlarge": newCPU(48, 3.1),
|
||||
"m5d.16xlarge": newCPU(64, 3.1),
|
||||
"m5d.24xlarge": newCPU(96, 3.1),
|
||||
"m5d.2xlarge": newCPU(8, 3.1),
|
||||
"m5d.4xlarge": newCPU(16, 3.1),
|
||||
"m5d.8xlarge": newCPU(32, 3.1),
|
||||
"m5d.large": newCPU(2, 3.1),
|
||||
"m5d.metal": newCPU(96, 3.1),
|
||||
"m5d.xlarge": newCPU(4, 3.1),
|
||||
"m5dn.12xlarge": newCPU(48, 3.1),
|
||||
"m5dn.16xlarge": newCPU(64, 3.1),
|
||||
"m5dn.24xlarge": newCPU(96, 3.1),
|
||||
"m5dn.2xlarge": newCPU(8, 3.1),
|
||||
"m5dn.4xlarge": newCPU(16, 3.1),
|
||||
"m5dn.8xlarge": newCPU(32, 3.1),
|
||||
"m5dn.large": newCPU(2, 3.1),
|
||||
"m5dn.metal": newCPU(96, 3.1),
|
||||
"m5dn.xlarge": newCPU(4, 3.1),
|
||||
"m5n.12xlarge": newCPU(48, 3.1),
|
||||
"m5n.16xlarge": newCPU(64, 3.1),
|
||||
"m5n.24xlarge": newCPU(96, 3.1),
|
||||
"m5n.2xlarge": newCPU(8, 3.1),
|
||||
"m5n.4xlarge": newCPU(16, 3.1),
|
||||
"m5n.8xlarge": newCPU(32, 3.1),
|
||||
"m5n.large": newCPU(2, 3.1),
|
||||
"m5n.metal": newCPU(96, 3.1),
|
||||
"m5n.xlarge": newCPU(4, 3.1),
|
||||
"m5zn.12xlarge": newCPU(48, 4.5),
|
||||
"m5zn.2xlarge": newCPU(8, 4.5),
|
||||
"m5zn.3xlarge": newCPU(12, 4.5),
|
||||
"m5zn.6xlarge": newCPU(24, 4.5),
|
||||
"m5zn.large": newCPU(2, 4.5),
|
||||
"m5zn.metal": newCPU(48, 4.5),
|
||||
"m5zn.xlarge": newCPU(4, 4.5),
|
||||
"m6g.12xlarge": newCPU(48, 2.5),
|
||||
"m6g.16xlarge": newCPU(64, 2.5),
|
||||
"m6g.2xlarge": newCPU(8, 2.5),
|
||||
"m6g.4xlarge": newCPU(16, 2.5),
|
||||
"m6g.8xlarge": newCPU(32, 2.5),
|
||||
"m6g.large": newCPU(2, 2.5),
|
||||
"m6g.medium": newCPU(1, 2.5),
|
||||
"m6g.metal": newCPU(64, 2.5),
|
||||
"m6g.xlarge": newCPU(4, 2.5),
|
||||
"m6gd.12xlarge": newCPU(48, 2.5),
|
||||
"m6gd.16xlarge": newCPU(64, 2.5),
|
||||
"m6gd.2xlarge": newCPU(8, 2.5),
|
||||
"m6gd.4xlarge": newCPU(16, 2.5),
|
||||
"m6gd.8xlarge": newCPU(32, 2.5),
|
||||
"m6gd.large": newCPU(2, 2.5),
|
||||
"m6gd.medium": newCPU(1, 2.5),
|
||||
"m6gd.metal": newCPU(64, 2.5),
|
||||
"m6gd.xlarge": newCPU(4, 2.5),
|
||||
"mac1.metal": newCPU(12, 3.2),
|
||||
"p2.16xlarge": newCPU(64, 2.3),
|
||||
"p2.8xlarge": newCPU(32, 2.7),
|
||||
"p2.xlarge": newCPU(4, 2.7),
|
||||
"p3.16xlarge": newCPU(64, 2.7),
|
||||
"p3.2xlarge": newCPU(8, 2.7),
|
||||
"p3.8xlarge": newCPU(32, 2.7),
|
||||
"p3dn.24xlarge": newCPU(96, 2.5),
|
||||
"p4d.24xlarge": newCPU(96, 3),
|
||||
"r3.2xlarge": newCPU(8, 2.5),
|
||||
"r3.4xlarge": newCPU(16, 2.5),
|
||||
"r3.8xlarge": newCPU(32, 2.5),
|
||||
"r3.large": newCPU(2, 2.5),
|
||||
"r3.xlarge": newCPU(4, 2.5),
|
||||
"r4.16xlarge": newCPU(64, 2.3),
|
||||
"r4.2xlarge": newCPU(8, 2.3),
|
||||
"r4.4xlarge": newCPU(16, 2.3),
|
||||
"r4.8xlarge": newCPU(32, 2.3),
|
||||
"r4.large": newCPU(2, 2.3),
|
||||
"r4.xlarge": newCPU(4, 2.3),
|
||||
"r5.12xlarge": newCPU(48, 3.1),
|
||||
"r5.16xlarge": newCPU(64, 3.1),
|
||||
"r5.24xlarge": newCPU(96, 3.1),
|
||||
"r5.2xlarge": newCPU(8, 3.1),
|
||||
"r5.4xlarge": newCPU(16, 3.1),
|
||||
"r5.8xlarge": newCPU(32, 3.1),
|
||||
"r5.large": newCPU(2, 3.1),
|
||||
"r5.metal": newCPU(96, 3.1),
|
||||
"r5.xlarge": newCPU(4, 3.1),
|
||||
"r5a.12xlarge": newCPU(48, 2.5),
|
||||
"r5a.16xlarge": newCPU(64, 2.5),
|
||||
"r5a.24xlarge": newCPU(96, 2.5),
|
||||
"r5a.2xlarge": newCPU(8, 2.5),
|
||||
"r5a.4xlarge": newCPU(16, 2.5),
|
||||
"r5a.8xlarge": newCPU(32, 2.5),
|
||||
"r5a.large": newCPU(2, 2.5),
|
||||
"r5a.xlarge": newCPU(4, 2.5),
|
||||
"r5ad.12xlarge": newCPU(48, 2.2),
|
||||
"r5ad.16xlarge": newCPU(64, 2.5),
|
||||
"r5ad.24xlarge": newCPU(96, 2.2),
|
||||
"r5ad.2xlarge": newCPU(8, 2.2),
|
||||
"r5ad.4xlarge": newCPU(16, 2.2),
|
||||
"r5ad.8xlarge": newCPU(32, 2.5),
|
||||
"r5ad.large": newCPU(2, 2.2),
|
||||
"r5ad.xlarge": newCPU(4, 2.2),
|
||||
"r5b.12xlarge": newCPU(48, 3.1),
|
||||
"r5b.16xlarge": newCPU(64, 3.1),
|
||||
"r5b.24xlarge": newCPU(96, 3.1),
|
||||
"r5b.2xlarge": newCPU(8, 3.1),
|
||||
"r5b.4xlarge": newCPU(16, 3.1),
|
||||
"r5b.8xlarge": newCPU(32, 3.1),
|
||||
"r5b.large": newCPU(2, 3.1),
|
||||
"r5b.metal": newCPU(96, 3.1),
|
||||
"r5b.xlarge": newCPU(4, 3.1),
|
||||
"r5d.12xlarge": newCPU(48, 3.1),
|
||||
"r5d.16xlarge": newCPU(64, 3.1),
|
||||
"r5d.24xlarge": newCPU(96, 3.1),
|
||||
"r5d.2xlarge": newCPU(8, 3.1),
|
||||
"r5d.4xlarge": newCPU(16, 3.1),
|
||||
"r5d.8xlarge": newCPU(32, 3.1),
|
||||
"r5d.large": newCPU(2, 3.1),
|
||||
"r5d.metal": newCPU(96, 3.1),
|
||||
"r5d.xlarge": newCPU(4, 3.1),
|
||||
"r5dn.12xlarge": newCPU(48, 3.1),
|
||||
"r5dn.16xlarge": newCPU(64, 3.1),
|
||||
"r5dn.24xlarge": newCPU(96, 3.1),
|
||||
"r5dn.2xlarge": newCPU(8, 3.1),
|
||||
"r5dn.4xlarge": newCPU(16, 3.1),
|
||||
"r5dn.8xlarge": newCPU(32, 3.1),
|
||||
"r5dn.large": newCPU(2, 3.1),
|
||||
"r5dn.metal": newCPU(96, 3.1),
|
||||
"r5dn.xlarge": newCPU(4, 3.1),
|
||||
"r5n.12xlarge": newCPU(48, 3.1),
|
||||
"r5n.16xlarge": newCPU(64, 3.1),
|
||||
"r5n.24xlarge": newCPU(96, 3.1),
|
||||
"r5n.2xlarge": newCPU(8, 3.1),
|
||||
"r5n.4xlarge": newCPU(16, 3.1),
|
||||
"r5n.8xlarge": newCPU(32, 3.1),
|
||||
"r5n.large": newCPU(2, 3.1),
|
||||
"r5n.metal": newCPU(96, 3.1),
|
||||
"r5n.xlarge": newCPU(4, 3.1),
|
||||
"r6g.12xlarge": newCPU(48, 2.5),
|
||||
"r6g.16xlarge": newCPU(64, 2.5),
|
||||
"r6g.2xlarge": newCPU(8, 2.5),
|
||||
"r6g.4xlarge": newCPU(16, 2.5),
|
||||
"r6g.8xlarge": newCPU(32, 2.5),
|
||||
"r6g.large": newCPU(2, 2.5),
|
||||
"r6g.medium": newCPU(1, 2.5),
|
||||
"r6g.metal": newCPU(64, 2.5),
|
||||
"r6g.xlarge": newCPU(4, 2.5),
|
||||
"r6gd.12xlarge": newCPU(48, 2.5),
|
||||
"r6gd.16xlarge": newCPU(64, 2.5),
|
||||
"r6gd.2xlarge": newCPU(8, 2.5),
|
||||
"r6gd.4xlarge": newCPU(16, 2.5),
|
||||
"r6gd.8xlarge": newCPU(32, 2.5),
|
||||
"r6gd.large": newCPU(2, 2.5),
|
||||
"r6gd.medium": newCPU(1, 2.5),
|
||||
"r6gd.metal": newCPU(64, 2.5),
|
||||
"r6gd.xlarge": newCPU(4, 2.5),
|
||||
"t2.2xlarge": newCPU(8, 2.3),
|
||||
"t2.large": newCPU(2, 2.3),
|
||||
"t2.medium": newCPU(2, 2.3),
|
||||
"t2.micro": newCPU(1, 2.5),
|
||||
"t2.nano": newCPU(1, 2.4),
|
||||
"t2.small": newCPU(1, 2.5),
|
||||
"t2.xlarge": newCPU(4, 2.3),
|
||||
"t3.2xlarge": newCPU(8, 2.5),
|
||||
"t3.large": newCPU(2, 2.5),
|
||||
"t3.medium": newCPU(2, 2.5),
|
||||
"t3.micro": newCPU(2, 2.5),
|
||||
"t3.nano": newCPU(2, 2.5),
|
||||
"t3.small": newCPU(2, 2.5),
|
||||
"t3.xlarge": newCPU(4, 2.5),
|
||||
"t3a.2xlarge": newCPU(8, 2.2),
|
||||
"t3a.large": newCPU(2, 2.2),
|
||||
"t3a.medium": newCPU(2, 2.2),
|
||||
"t3a.micro": newCPU(2, 2.2),
|
||||
"t3a.nano": newCPU(2, 2.2),
|
||||
"t3a.small": newCPU(2, 2.2),
|
||||
"t3a.xlarge": newCPU(4, 2.2),
|
||||
"t4g.2xlarge": newCPU(8, 2.5),
|
||||
"t4g.large": newCPU(2, 2.5),
|
||||
"t4g.medium": newCPU(2, 2.5),
|
||||
"t4g.micro": newCPU(2, 2.5),
|
||||
"t4g.nano": newCPU(2, 2.5),
|
||||
"t4g.small": newCPU(2, 2.5),
|
||||
"t4g.xlarge": newCPU(4, 2.5),
|
||||
"u-12tb1.112xlarge": newCPU(448, 2.1),
|
||||
"u-6tb1.112xlarge": newCPU(448, 2.1),
|
||||
"u-6tb1.56xlarge": newCPU(224, 2.1),
|
||||
"u-9tb1.112xlarge": newCPU(448, 2.1),
|
||||
"x1.16xlarge": newCPU(64, 2.3),
|
||||
"x1.32xlarge": newCPU(128, 2.3),
|
||||
"x1e.16xlarge": newCPU(64, 2.3),
|
||||
"x1e.2xlarge": newCPU(8, 2.3),
|
||||
"x1e.32xlarge": newCPU(128, 2.3),
|
||||
"x1e.4xlarge": newCPU(16, 2.3),
|
||||
"x1e.8xlarge": newCPU(32, 2.3),
|
||||
"x1e.xlarge": newCPU(4, 2.3),
|
||||
"x2gd.12xlarge": newCPU(48, 2.5),
|
||||
"x2gd.16xlarge": newCPU(64, 2.5),
|
||||
"x2gd.2xlarge": newCPU(8, 2.5),
|
||||
"x2gd.4xlarge": newCPU(16, 2.5),
|
||||
"x2gd.8xlarge": newCPU(32, 2.5),
|
||||
"x2gd.large": newCPU(2, 2.5),
|
||||
"x2gd.medium": newCPU(1, 2.5),
|
||||
"x2gd.metal": newCPU(64, 2.5),
|
||||
"x2gd.xlarge": newCPU(4, 2.5),
|
||||
"z1d.12xlarge": newCPU(48, 4),
|
||||
"z1d.2xlarge": newCPU(8, 4),
|
||||
"z1d.3xlarge": newCPU(12, 4),
|
||||
"z1d.6xlarge": newCPU(24, 4),
|
||||
"z1d.large": newCPU(2, 4),
|
||||
"z1d.metal": newCPU(48, 4),
|
||||
"z1d.xlarge": newCPU(4, 4),
|
||||
}
|
||||
|
|
Loading…
Reference in a new issue