2019-06-11 19:18:37 +00:00
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// Copyright (c) 2011-present, Facebook, Inc. All rights reserved.
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// This source code is licensed under both the GPLv2 (found in the
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// COPYING file in the root directory) and Apache 2.0 License
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// (found in the LICENSE.Apache file in the root directory).
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#pragma once
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#include <map>
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2019-06-25 03:38:20 +00:00
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#include <set>
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2019-06-11 19:18:37 +00:00
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#include <vector>
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#include "rocksdb/env.h"
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Support computing miss ratio curves using sim_cache. (#5449)
Summary:
This PR adds a BlockCacheTraceSimulator that reports the miss ratios given different cache configurations. A cache configuration contains "cache_name,num_shard_bits,cache_capacities". For example, "lru, 1, 1K, 2K, 4M, 4G".
When we replay the trace, we also perform lookups and inserts on the simulated caches.
In the end, it reports the miss ratio for each tuple <cache_name, num_shard_bits, cache_capacity> in a output file.
This PR also adds a main source block_cache_trace_analyzer so that we can run the analyzer in command line.
Pull Request resolved: https://github.com/facebook/rocksdb/pull/5449
Test Plan:
Added tests for block_cache_trace_analyzer.
COMPILE_WITH_ASAN=1 make check -j32.
Differential Revision: D15797073
Pulled By: HaoyuHuang
fbshipit-source-id: aef0c5c2e7938f3e8b6a10d4a6a50e6928ecf408
2019-06-17 23:33:40 +00:00
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#include "rocksdb/utilities/sim_cache.h"
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2019-06-11 19:18:37 +00:00
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#include "trace_replay/block_cache_tracer.h"
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namespace rocksdb {
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2019-06-25 03:38:20 +00:00
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const uint64_t kMicrosInSecond = 1000000;
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Support computing miss ratio curves using sim_cache. (#5449)
Summary:
This PR adds a BlockCacheTraceSimulator that reports the miss ratios given different cache configurations. A cache configuration contains "cache_name,num_shard_bits,cache_capacities". For example, "lru, 1, 1K, 2K, 4M, 4G".
When we replay the trace, we also perform lookups and inserts on the simulated caches.
In the end, it reports the miss ratio for each tuple <cache_name, num_shard_bits, cache_capacity> in a output file.
This PR also adds a main source block_cache_trace_analyzer so that we can run the analyzer in command line.
Pull Request resolved: https://github.com/facebook/rocksdb/pull/5449
Test Plan:
Added tests for block_cache_trace_analyzer.
COMPILE_WITH_ASAN=1 make check -j32.
Differential Revision: D15797073
Pulled By: HaoyuHuang
fbshipit-source-id: aef0c5c2e7938f3e8b6a10d4a6a50e6928ecf408
2019-06-17 23:33:40 +00:00
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class BlockCacheTraceAnalyzer;
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// A cache configuration provided by user.
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struct CacheConfiguration {
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std::string cache_name; // LRU.
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uint32_t num_shard_bits;
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std::vector<uint64_t>
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cache_capacities; // simulate cache capacities in bytes.
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};
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// A block cache simulator that reports miss ratio curves given a set of cache
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// configurations.
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class BlockCacheTraceSimulator {
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public:
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// warmup_seconds: The number of seconds to warmup simulated caches. The
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// hit/miss counters are reset after the warmup completes.
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BlockCacheTraceSimulator(
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2019-06-19 01:34:39 +00:00
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uint64_t warmup_seconds, uint32_t downsample_ratio,
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Support computing miss ratio curves using sim_cache. (#5449)
Summary:
This PR adds a BlockCacheTraceSimulator that reports the miss ratios given different cache configurations. A cache configuration contains "cache_name,num_shard_bits,cache_capacities". For example, "lru, 1, 1K, 2K, 4M, 4G".
When we replay the trace, we also perform lookups and inserts on the simulated caches.
In the end, it reports the miss ratio for each tuple <cache_name, num_shard_bits, cache_capacity> in a output file.
This PR also adds a main source block_cache_trace_analyzer so that we can run the analyzer in command line.
Pull Request resolved: https://github.com/facebook/rocksdb/pull/5449
Test Plan:
Added tests for block_cache_trace_analyzer.
COMPILE_WITH_ASAN=1 make check -j32.
Differential Revision: D15797073
Pulled By: HaoyuHuang
fbshipit-source-id: aef0c5c2e7938f3e8b6a10d4a6a50e6928ecf408
2019-06-17 23:33:40 +00:00
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const std::vector<CacheConfiguration>& cache_configurations);
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~BlockCacheTraceSimulator() = default;
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// No copy and move.
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BlockCacheTraceSimulator(const BlockCacheTraceSimulator&) = delete;
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BlockCacheTraceSimulator& operator=(const BlockCacheTraceSimulator&) = delete;
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BlockCacheTraceSimulator(BlockCacheTraceSimulator&&) = delete;
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BlockCacheTraceSimulator& operator=(BlockCacheTraceSimulator&&) = delete;
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void Access(const BlockCacheTraceRecord& access);
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const std::vector<std::shared_ptr<SimCache>>& sim_caches() const {
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return sim_caches_;
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}
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const std::vector<CacheConfiguration>& cache_configurations() const {
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return cache_configurations_;
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}
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private:
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const uint64_t warmup_seconds_;
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2019-06-19 01:34:39 +00:00
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const uint32_t downsample_ratio_;
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Support computing miss ratio curves using sim_cache. (#5449)
Summary:
This PR adds a BlockCacheTraceSimulator that reports the miss ratios given different cache configurations. A cache configuration contains "cache_name,num_shard_bits,cache_capacities". For example, "lru, 1, 1K, 2K, 4M, 4G".
When we replay the trace, we also perform lookups and inserts on the simulated caches.
In the end, it reports the miss ratio for each tuple <cache_name, num_shard_bits, cache_capacity> in a output file.
This PR also adds a main source block_cache_trace_analyzer so that we can run the analyzer in command line.
Pull Request resolved: https://github.com/facebook/rocksdb/pull/5449
Test Plan:
Added tests for block_cache_trace_analyzer.
COMPILE_WITH_ASAN=1 make check -j32.
Differential Revision: D15797073
Pulled By: HaoyuHuang
fbshipit-source-id: aef0c5c2e7938f3e8b6a10d4a6a50e6928ecf408
2019-06-17 23:33:40 +00:00
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const std::vector<CacheConfiguration> cache_configurations_;
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bool warmup_complete_ = false;
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std::vector<std::shared_ptr<SimCache>> sim_caches_;
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uint64_t trace_start_time_ = 0;
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};
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2019-06-11 19:18:37 +00:00
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// Statistics of a block.
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struct BlockAccessInfo {
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uint64_t num_accesses = 0;
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uint64_t block_size = 0;
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uint64_t first_access_time = 0;
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uint64_t last_access_time = 0;
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uint64_t num_keys = 0;
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std::map<std::string, uint64_t>
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key_num_access_map; // for keys exist in this block.
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std::map<std::string, uint64_t>
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non_exist_key_num_access_map; // for keys do not exist in this block.
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uint64_t num_referenced_key_exist_in_block = 0;
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2019-06-20 21:28:22 +00:00
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std::map<TableReaderCaller, uint64_t> caller_num_access_map;
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2019-06-25 03:38:20 +00:00
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// caller:timestamp:number_of_accesses. The granularity of the timestamp is
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// seconds.
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std::map<TableReaderCaller, std::map<uint64_t, uint64_t>>
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caller_num_accesses_timeline;
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// Unique blocks since the last access.
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std::set<std::string> unique_blocks_since_last_access;
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// Number of reuses grouped by reuse distance.
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std::map<uint64_t, uint64_t> reuse_distance_count;
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2019-06-11 19:18:37 +00:00
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void AddAccess(const BlockCacheTraceRecord& access) {
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if (first_access_time == 0) {
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first_access_time = access.access_timestamp;
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}
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last_access_time = access.access_timestamp;
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block_size = access.block_size;
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caller_num_access_map[access.caller]++;
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num_accesses++;
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2019-06-25 03:38:20 +00:00
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// access.access_timestamp is in microsecond.
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const uint64_t timestamp_in_seconds =
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access.access_timestamp / kMicrosInSecond;
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caller_num_accesses_timeline[access.caller][timestamp_in_seconds] += 1;
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2019-06-15 00:37:24 +00:00
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if (BlockCacheTraceHelper::ShouldTraceReferencedKey(access.block_type,
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access.caller)) {
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2019-06-11 19:18:37 +00:00
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num_keys = access.num_keys_in_block;
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2019-06-15 00:37:24 +00:00
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if (access.referenced_key_exist_in_block == Boolean::kTrue) {
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2019-06-11 19:18:37 +00:00
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key_num_access_map[access.referenced_key]++;
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num_referenced_key_exist_in_block++;
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} else {
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non_exist_key_num_access_map[access.referenced_key]++;
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}
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}
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}
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};
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// Aggregates stats of a block given a block type.
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struct BlockTypeAccessInfoAggregate {
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std::map<std::string, BlockAccessInfo> block_access_info_map;
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};
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// Aggregates BlockTypeAggregate given a SST file.
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struct SSTFileAccessInfoAggregate {
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uint32_t level;
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std::map<TraceType, BlockTypeAccessInfoAggregate> block_type_aggregates_map;
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};
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// Aggregates SSTFileAggregate given a column family.
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struct ColumnFamilyAccessInfoAggregate {
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std::map<uint64_t, SSTFileAccessInfoAggregate> fd_aggregates_map;
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};
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class BlockCacheTraceAnalyzer {
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public:
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Support computing miss ratio curves using sim_cache. (#5449)
Summary:
This PR adds a BlockCacheTraceSimulator that reports the miss ratios given different cache configurations. A cache configuration contains "cache_name,num_shard_bits,cache_capacities". For example, "lru, 1, 1K, 2K, 4M, 4G".
When we replay the trace, we also perform lookups and inserts on the simulated caches.
In the end, it reports the miss ratio for each tuple <cache_name, num_shard_bits, cache_capacity> in a output file.
This PR also adds a main source block_cache_trace_analyzer so that we can run the analyzer in command line.
Pull Request resolved: https://github.com/facebook/rocksdb/pull/5449
Test Plan:
Added tests for block_cache_trace_analyzer.
COMPILE_WITH_ASAN=1 make check -j32.
Differential Revision: D15797073
Pulled By: HaoyuHuang
fbshipit-source-id: aef0c5c2e7938f3e8b6a10d4a6a50e6928ecf408
2019-06-17 23:33:40 +00:00
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BlockCacheTraceAnalyzer(
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2019-06-25 03:38:20 +00:00
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const std::string& trace_file_path, const std::string& output_dir,
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Support computing miss ratio curves using sim_cache. (#5449)
Summary:
This PR adds a BlockCacheTraceSimulator that reports the miss ratios given different cache configurations. A cache configuration contains "cache_name,num_shard_bits,cache_capacities". For example, "lru, 1, 1K, 2K, 4M, 4G".
When we replay the trace, we also perform lookups and inserts on the simulated caches.
In the end, it reports the miss ratio for each tuple <cache_name, num_shard_bits, cache_capacity> in a output file.
This PR also adds a main source block_cache_trace_analyzer so that we can run the analyzer in command line.
Pull Request resolved: https://github.com/facebook/rocksdb/pull/5449
Test Plan:
Added tests for block_cache_trace_analyzer.
COMPILE_WITH_ASAN=1 make check -j32.
Differential Revision: D15797073
Pulled By: HaoyuHuang
fbshipit-source-id: aef0c5c2e7938f3e8b6a10d4a6a50e6928ecf408
2019-06-17 23:33:40 +00:00
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std::unique_ptr<BlockCacheTraceSimulator>&& cache_simulator);
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2019-06-11 19:18:37 +00:00
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~BlockCacheTraceAnalyzer() = default;
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// No copy and move.
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BlockCacheTraceAnalyzer(const BlockCacheTraceAnalyzer&) = delete;
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BlockCacheTraceAnalyzer& operator=(const BlockCacheTraceAnalyzer&) = delete;
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BlockCacheTraceAnalyzer(BlockCacheTraceAnalyzer&&) = delete;
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BlockCacheTraceAnalyzer& operator=(BlockCacheTraceAnalyzer&&) = delete;
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// Read all access records in the given trace_file, maintains the stats of
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// a block, and aggregates the information by block type, sst file, and column
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// family. Subsequently, the caller may call Print* functions to print
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// statistics.
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Status Analyze();
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// Print a summary of statistics of the trace, e.g.,
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// Number of files: 2 Number of blocks: 50 Number of accesses: 50
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// Number of Index blocks: 10
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// Number of Filter blocks: 10
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// Number of Data blocks: 10
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// Number of UncompressionDict blocks: 10
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// Number of RangeDeletion blocks: 10
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// ***************************************************************
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// Caller Get: Number of accesses 10
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// Caller Get: Number of accesses per level break down
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// Level 0: Number of accesses: 10
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// Caller Get: Number of accesses per block type break down
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// Block Type Index: Number of accesses: 2
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// Block Type Filter: Number of accesses: 2
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// Block Type Data: Number of accesses: 2
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// Block Type UncompressionDict: Number of accesses: 2
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// Block Type RangeDeletion: Number of accesses: 2
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void PrintStatsSummary() const;
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// Print block size distribution and the distribution break down by block type
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// and column family.
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void PrintBlockSizeStats() const;
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// Print access count distribution and the distribution break down by block
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// type and column family.
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void PrintAccessCountStats() const;
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// Print data block accesses by user Get and Multi-Get.
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// It prints out 1) A histogram on the percentage of keys accessed in a data
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// block break down by if a referenced key exists in the data block andthe
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// histogram break down by column family. 2) A histogram on the percentage of
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// accesses on keys exist in a data block and its break down by column family.
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void PrintDataBlockAccessStats() const;
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2019-06-25 03:38:20 +00:00
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// Write miss ratio curves of simulated cache configurations into a csv file
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// saved in 'output_dir'.
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void WriteMissRatioCurves() const;
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// Write the access timeline into a csv file saved in 'output_dir'.
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void WriteAccessTimeline(const std::string& label) const;
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// Write the reuse distance into a csv file saved in 'output_dir'. Reuse
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// distance is defined as the cumulated size of unique blocks read between two
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// consective accesses on the same block.
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void WriteReuseDistance(const std::string& label_str,
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const std::set<uint64_t>& distance_buckets) const;
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// Write the reuse interval into a csv file saved in 'output_dir'. Reuse
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// interval is defined as the time between two consecutive accesses on the
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// same block..
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void WriteReuseInterval(const std::string& label_str,
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const std::set<uint64_t>& time_buckets) const;
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Support computing miss ratio curves using sim_cache. (#5449)
Summary:
This PR adds a BlockCacheTraceSimulator that reports the miss ratios given different cache configurations. A cache configuration contains "cache_name,num_shard_bits,cache_capacities". For example, "lru, 1, 1K, 2K, 4M, 4G".
When we replay the trace, we also perform lookups and inserts on the simulated caches.
In the end, it reports the miss ratio for each tuple <cache_name, num_shard_bits, cache_capacity> in a output file.
This PR also adds a main source block_cache_trace_analyzer so that we can run the analyzer in command line.
Pull Request resolved: https://github.com/facebook/rocksdb/pull/5449
Test Plan:
Added tests for block_cache_trace_analyzer.
COMPILE_WITH_ASAN=1 make check -j32.
Differential Revision: D15797073
Pulled By: HaoyuHuang
fbshipit-source-id: aef0c5c2e7938f3e8b6a10d4a6a50e6928ecf408
2019-06-17 23:33:40 +00:00
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2019-06-11 19:18:37 +00:00
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const std::map<std::string, ColumnFamilyAccessInfoAggregate>&
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TEST_cf_aggregates_map() const {
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return cf_aggregates_map_;
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}
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private:
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2019-06-25 03:38:20 +00:00
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std::set<std::string> ParseLabelStr(const std::string& label_str) const;
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std::string BuildLabel(const std::set<std::string>& labels,
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const std::string& cf_name, uint64_t fd,
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uint32_t level, TraceType type,
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TableReaderCaller caller,
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const std::string& block_key) const;
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void ComputeReuseDistance(BlockAccessInfo* info) const;
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2019-06-11 19:18:37 +00:00
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void RecordAccess(const BlockCacheTraceRecord& access);
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2019-06-25 03:38:20 +00:00
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void UpdateReuseIntervalStats(
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const std::string& label, const std::set<uint64_t>& time_buckets,
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const std::map<uint64_t, uint64_t> timeline,
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std::map<std::string, std::map<uint64_t, uint64_t>>*
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label_time_num_reuses,
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uint64_t* total_num_reuses) const;
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2019-06-11 19:18:37 +00:00
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rocksdb::Env* env_;
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Support computing miss ratio curves using sim_cache. (#5449)
Summary:
This PR adds a BlockCacheTraceSimulator that reports the miss ratios given different cache configurations. A cache configuration contains "cache_name,num_shard_bits,cache_capacities". For example, "lru, 1, 1K, 2K, 4M, 4G".
When we replay the trace, we also perform lookups and inserts on the simulated caches.
In the end, it reports the miss ratio for each tuple <cache_name, num_shard_bits, cache_capacity> in a output file.
This PR also adds a main source block_cache_trace_analyzer so that we can run the analyzer in command line.
Pull Request resolved: https://github.com/facebook/rocksdb/pull/5449
Test Plan:
Added tests for block_cache_trace_analyzer.
COMPILE_WITH_ASAN=1 make check -j32.
Differential Revision: D15797073
Pulled By: HaoyuHuang
fbshipit-source-id: aef0c5c2e7938f3e8b6a10d4a6a50e6928ecf408
2019-06-17 23:33:40 +00:00
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const std::string trace_file_path_;
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2019-06-25 03:38:20 +00:00
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const std::string output_dir_;
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Support computing miss ratio curves using sim_cache. (#5449)
Summary:
This PR adds a BlockCacheTraceSimulator that reports the miss ratios given different cache configurations. A cache configuration contains "cache_name,num_shard_bits,cache_capacities". For example, "lru, 1, 1K, 2K, 4M, 4G".
When we replay the trace, we also perform lookups and inserts on the simulated caches.
In the end, it reports the miss ratio for each tuple <cache_name, num_shard_bits, cache_capacity> in a output file.
This PR also adds a main source block_cache_trace_analyzer so that we can run the analyzer in command line.
Pull Request resolved: https://github.com/facebook/rocksdb/pull/5449
Test Plan:
Added tests for block_cache_trace_analyzer.
COMPILE_WITH_ASAN=1 make check -j32.
Differential Revision: D15797073
Pulled By: HaoyuHuang
fbshipit-source-id: aef0c5c2e7938f3e8b6a10d4a6a50e6928ecf408
2019-06-17 23:33:40 +00:00
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2019-06-11 19:18:37 +00:00
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BlockCacheTraceHeader header_;
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Support computing miss ratio curves using sim_cache. (#5449)
Summary:
This PR adds a BlockCacheTraceSimulator that reports the miss ratios given different cache configurations. A cache configuration contains "cache_name,num_shard_bits,cache_capacities". For example, "lru, 1, 1K, 2K, 4M, 4G".
When we replay the trace, we also perform lookups and inserts on the simulated caches.
In the end, it reports the miss ratio for each tuple <cache_name, num_shard_bits, cache_capacity> in a output file.
This PR also adds a main source block_cache_trace_analyzer so that we can run the analyzer in command line.
Pull Request resolved: https://github.com/facebook/rocksdb/pull/5449
Test Plan:
Added tests for block_cache_trace_analyzer.
COMPILE_WITH_ASAN=1 make check -j32.
Differential Revision: D15797073
Pulled By: HaoyuHuang
fbshipit-source-id: aef0c5c2e7938f3e8b6a10d4a6a50e6928ecf408
2019-06-17 23:33:40 +00:00
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std::unique_ptr<BlockCacheTraceSimulator> cache_simulator_;
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2019-06-11 19:18:37 +00:00
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std::map<std::string, ColumnFamilyAccessInfoAggregate> cf_aggregates_map_;
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2019-06-25 03:38:20 +00:00
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std::map<std::string, BlockAccessInfo*> block_info_map_;
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2019-06-11 19:18:37 +00:00
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};
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Support computing miss ratio curves using sim_cache. (#5449)
Summary:
This PR adds a BlockCacheTraceSimulator that reports the miss ratios given different cache configurations. A cache configuration contains "cache_name,num_shard_bits,cache_capacities". For example, "lru, 1, 1K, 2K, 4M, 4G".
When we replay the trace, we also perform lookups and inserts on the simulated caches.
In the end, it reports the miss ratio for each tuple <cache_name, num_shard_bits, cache_capacity> in a output file.
This PR also adds a main source block_cache_trace_analyzer so that we can run the analyzer in command line.
Pull Request resolved: https://github.com/facebook/rocksdb/pull/5449
Test Plan:
Added tests for block_cache_trace_analyzer.
COMPILE_WITH_ASAN=1 make check -j32.
Differential Revision: D15797073
Pulled By: HaoyuHuang
fbshipit-source-id: aef0c5c2e7938f3e8b6a10d4a6a50e6928ecf408
2019-06-17 23:33:40 +00:00
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int block_cache_trace_analyzer_tool(int argc, char** argv);
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2019-06-11 19:18:37 +00:00
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} // namespace rocksdb
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