Add riscv64 support (#14)

Signed-off-by: Felix Yan <felixonmars@archlinux.org>
This commit is contained in:
Felix Yan 2021-09-17 16:52:44 +08:00 committed by GitHub
parent 2d242ee725
commit 52de4257fa
No known key found for this signature in database
GPG Key ID: 4AEE18F83AFDEB23
3 changed files with 7 additions and 0 deletions

View File

@ -32,6 +32,7 @@ const MIN_ALIGN: usize = 8;
target_arch = "powerpc64",
target_arch = "powerpc64le",
target_arch = "mips64",
target_arch = "riscv64",
target_arch = "s390x",
target_arch = "sparc64"
)))]

View File

@ -309,6 +309,11 @@ fn main() {
} else if !target.contains("windows") {
println!("cargo:rustc-link-lib=pthread");
}
// GCC may generate a __atomic_exchange_1 library call which requires -latomic
// during the final linking. https://github.com/riscv-collab/riscv-gcc/issues/12
if target.contains("riscv") {
println!("cargo:rustc-link-lib=atomic");
}
println!("cargo:rerun-if-changed=jemalloc");
}

View File

@ -54,6 +54,7 @@ const ALIGNOF_MAX_ALIGN_T: usize = 8;
target_arch = "powerpc64",
target_arch = "powerpc64le",
target_arch = "mips64",
target_arch = "riscv64",
target_arch = "s390x",
target_arch = "sparc64"
)))]